DVB-S2 Compliant LLR IP Core
The AHA4702L LLR Demapper Core is an optional IP core that can be used in front of the AHA4702D decoder core.  This core takes in digital I/Q symbol data and outputs soft metric symbol values or LLRs.
  • DVB-S2 Compliant LLR Demapper
  • Exceeds 150 Megasymbols per second
  • Code change on the fly
  • Full ACM and VCM compliance
  • Supports QPSK, 8 PSK, 16 APSK and 32 APSK constellations
  • Available as an ASIC or FPGA core
  • All DVB-S2 MCTs supported
  • Synthesized netlist
  • Simulation netlist
  • Constellation point list file
Product Briefs

Product Specifications
AHA4702L Specification - DVB-S2 Compliant LLR IP Core


Data Compression

Forward Error Correction

Encryption and Hashing

Regular Expression Search

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